Tuesday, December 18, 2012

Programming Timer and Counter in AT89S51/52 Part 1

Figure 1. Timer and Counter in AT89S51/52

Robometricschool. - In this time i want to discuss about programming timer and counter in AT89S51/52 part 1. From this discussing you will understand about basically, features, working mode and register timer and counter in AT89S51/52.  


Basically, this input device is a binary counter (binary counter) that is connected directly to the microcontroller-data, so that the microcontroller can read the position of the counter, if necessary microcontroller can also change the position of the counter.

With timer and counter, user can use it to measure pulse width, pulse width evoke a definite, used in the control voltage is PWM (Pulse Width Modulation) and is necessary for applications with infrared remote control.
 
Like a binary counter, when the signal pulse (clock) that fed it exceeds the counter, then at the end of the message counter will arise overflow signal, this signal is an important thing in using the enumerator. The overflow counter is recorded in a flip-flop itself. In addition, the pulse signal which is fed to the counter should also be controlled easily.

Figure 2. Basically Timer/ Counter AT89S51/52

From figure 1 above we know that pulse signal which is fed to the counter can be divided into two types, the first is a fixed frequency pulse signal is already known that both the magnitude and the frequency of the pulse signal is not fixed.

If a counter works with fixed frequencies of known magnitude, it is said to work as a timer counter, because the position of the counter is equivalent to the time that can be determined with certainty.
 
If a counter works with no fixed frequency, said enumerators worked as a counter, the counter position is simply stating the number of pulses that are received counter.
 
String binary counter is used, can be an ascending binary counter (count up binary counter) or binary down counter (count down binary counter).

Timer / Counter as a means of input are often found in the microcontroller, such as family microcontrollers MCS48, MCS51 or MC68HC11 family all have a Timer / Counter on the chip as a means of input. In addition it can also be found chip Timer / Counter that stands alone as supporting the work of microprocessors, such as 8253/8254 programmable Interval Timer made ​​by Intel, or MC6840 Programmable Counter / Timer made by Motorola.


MCS51 microcontroller families such as AT89C51 or AT89S51 , comes with two sets of Timer / Counter, respectively named as Timer 0 and Timer 1. As for the larger types, such as AT89S52, has added a set Timer / Counter again named as Timer 2.

Devices Timer / Counter is the hardware into one chip microcontroller in MCS51, MCS51 microcontroller for the user device known as SFR (Special Function Register) which serves as a memory-internal data. 

Counting binary for Timer 0 TL0 register is formed by (Timer 0 Low Byte, memory-internal data 6AH number) and register TH0 (Timer 0 High Byte, memory-internal data 6CH numbers). 

Counting binary for Timer 1 registers formed with TL1 (Timer 1 Low Byte, memory-internal data 6BH number) and register TH1 (Timer 1 High Byte, memory-internal data 6DH numbers). 

Shaper Binary Counting Timer / Counter MCS51 an ascending binary counter (count up binary counter) that counts up from 0000H to FFFFH, the current position of the enumerator changed from 0000H to FFFFH back to signal an overflow will occur. 

To regulate Timer / Counter used two additional registers that are shared by Timer 0 and Timer 1. Additional registers are registers TCON (Timer Control Register, the number of internal data memory-88H, the address can be a bit) and register TMOD (Timer Mode Register, the number of internal data memory-89H).


TL0, TH0, TL1 and TH1 is a SFR (Special Function Register) is used to form the binary counter Timer 0 and Timer 1. The capacity of the four registers each of 8 bits, can be arranged into 4 kinds of mode binary counter as shown in Figure 40a to Figure 40d.
 
In Mode 0, Mode 1 and Mode 2 Timer 0 and Timer 1 each work alone, that could be made to work on Timer 0 Timer 1 Mode 1 and Mode 2 work on, or a combination of other modes as appropriate.
 
In Mode 3 TL0, TH0, TL1 and TH1 used together to construct a system timer that can not be other combinations.
  • Mode 0 - 13-bit binary counter
Figure 3. Mode 0 - 13-bit binary counter

Counting binary formed by TLx (TL0 or TL1 could mean) as a 5-bit binary counter (although actual capacity of 8 bits), an abundance of 5-bit binary counter is connected to the THx (the idea is TH0 or TH1) to form a string of 13-bit binary counter, overflow of 13-bit counter is housed in a flip-flop TFX (that could TF0 or TF1), which is in register TCON.
This fashion forward means the timer is on MCS48 microcontroller (microcontroller MCS51 predecessor), with the intent of the design tool created by MCS48 can be easily adapted to MCS51. This mode is not much use anymore.
  • Mode 1 - 16 bit binary counter
Figure 4. Mode 1 - 16-bit binary counter

This mode is the same as Mode 0, except that registers TLx fully used as an 8-bit binary counter, so the capacity of the binary counter is 16 bits tersbentuk. Along with the pulse signal, the position of 16-bit binary counter will move from 0000H (binary 0000 0000 0000 0000), 0001H, 0002H ... to FFFFH (binary 1111 1111 1111 1111), then overflow back to 0000H.
  • Mode 2 - 8-bit binary counter with Refills
Figure 5. Mode 2 - 8-bit binary counter with refills

TLX is used as an 8-bit binary counter, while THX used to store the values ​​entered into TLX repeat, each time position TLX overflows (changes from FFH to be 00H). In this way the signal can be recovered spill frequency is determined by the value stored in TH0.   
  • Mode 3 - Combined Binary Counter 16-bit and 8 Bit
Figure 6. Mode 3 - Combined Binary Counter 16-bit and 8-Bit

In Mode 3 TL0, TH0, TL1 and TH1 used to form the three strands of the counter, the first is the string of 16-bit binary counter without overflow signal monitoring facility established with TL1 and TH1. The second is TL0 used as 8-bit binary counter with overflow TF0 as a means of monitoring. The third binary enumerator TH0 used as 8-bit binary counter with overflow TF1 as a means of monitoring.


Register TMOD and TCON registers a helper to set the working register Timer 0 and Timer 1, the second register is shared by the Timer 0 and Timer 1.  

TMOD Register
Figure 7. TMOD Register

TMOD register is divided into 2 parts by simitris, bits 0 to 3 TMOD register (TMOD TMOD bits bits 0 .. 3) is used to set the Timer 0, bits 4 to 7 TMODE register (TMOD TMOD bits bits 4 .. 7) is used to adjust timer 1, use the following:
  • Bit M0/M1 used to determine the Timer Mode as seen in the table in Figure 41a.
  • Bit C / T * is used to set the pulse signal source is fed to a binary counter. If C / T * = 0 pulse signal obtained from a crystal oscillator whose frequency is divided by 12, whereas if C / T * = 1, the signal obtained from a foot pulse T0 (for Timer 0) or T1 leg (for Timer 1). 
  • GATE Bit is a bit regulator channel pulse signal. When GATE = 0 channel bit pulse signal is only governed by bit TRx (that is TR0 or TR1 in register TCON). When GATE = 1 foot bit INT0 (for Timer 0) or foot INT1 (for Timer 1) is also used to set the pulse signal line. 
TCON Register
Figure 8. TCON Register
TCON register is divided into two parts, the first 4 bits (bit 0 .. bit 3, the shaded section in Figure 41b) is used for the purposes set foot INT0 and INT1, all four of these bits is discussed in other parts.
The remaining 4 bits of TCON register (bits 4 .. bit 7) is divided into 2 sections are used to regulate
symmetric Timer0/Timer 1, as follows:
  • Bit TFX (that is TF0 or TF1) is a bit reservoir overflow (see Figure 40), TFX will be a '1 'whenever a binary counter connected to them abundant (enumerator position changes from FFFFH back to 0000H). TFX-zero bits in the CLR with istruksi TF0 or CLR TF1. If the vehicle timer interrupt 0/Timer first used, TRx-zero at the time AT89S51 runs interrupt service routine (ISR - interrupt service routines).
  • Bit TRx (that is TR0 or TR1) is a bit regulator channel pulse signal, when this bit = 0 pulse signal is not transmitted to the binary counter so that the counter stops counting. When the GATE bit in register TMOD = 1, then the channel pulse signal is governed jointly by the TRx and signals on INT0/INT1. 
Let Continue to Part 2 :

Writing  by : Budhy Sutanto


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